Component Packaging

This section includes all the packaging diagrams available in Datasheet Reference.

Integrated circuit packaging is the final stage of semiconductor device fabrication per se, followed by IC testing.

In the integrated circuit industry it is called simply packaging and sometimes semiconductor device assembly, or simply assembly. Also, sometimes it is called encapsulation or seal, by the name of its last step, which might lead to confusion, because the term packaging generally comprises the steps or the technology of mounting and interconnecting of devices

Common Packages

* CPGA: Ceramic pin grid array
* PDIP: Plastic dual in-line package
* BGA : Ball grid array
* SO: Small outline
o SOIC: Small outline integrated circuit
o SOT: Small outline transistor
o SOJ: Small outline J-lead
* PQFP: Plastic quad flat package
* PLCC: plastic leaded chip carrier
* TO: transistor outline

Chip packages

* In-line package
o DIP
o SIP
o ZIP

* Optical package
o Photodiode
o LED
o IR
o Photo interrupt

* Pin grid array
o PGA

* Small outline package:
o SO
o SOP
o SOIC
o SOT
o SC

* Transistor outline
o TO

* Ball grid array
o BGA
o CSP
o Micro-array
o MicroSMD
o CGA: Column grid array

* Quad package
o QFP
o HQFP

* Leadless package
o QFN
o SON
o LGA


* J-lead package
o SOJ
o LCC


* 2 lead package
o Diodes
+ DO
+ SOD
o Resistors
o Capacitors
o inductors

* I-lead package
o CERPACK
o CERQUAD
o QFI
o SOI

* Non-standard

* Unsorted